Design and Implementation of Inexact Multiplier Using 4:2 Compressors with Adaptive Error Control

Abstract

Multipliers are crucial in Digital Signal Processing (DSP) applications, but traditional designs have drawbacks like high power use, large size, and long processing times. Inexact multipliers, which allow for small inaccuracies, have become a promising solution as they save power and reduce delays while maintaining acceptable accuracy. However, modern applications require high accuracy, leading to the need for energy-efficient and compact inexact multipliers. In this article, we introduce a new design for an inexact multiplier that is both low-power and space-saving while achieving high accuracy. A key feature is an error compensation circuit designed to improve accuracy. We use approximation techniques at both the compressor and multiplier stages, significantly cutting down on size and power use. This balance of efficiency and precision meets the demands of current DSP applications. Our experiments show that our custom-designed multiplier performs exceptionally well compared to existing solutions. It reduces power use by 72%, cuts latency by 27%, and decreases size by 7%, all without sacrificing accuracy. This demonstrates the effectiveness and competitiveness of our innovative approach.