FPGA Based Compressed Heart Rate Changeability Recoding Algorithm
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Abstract
The paper mentioned describes a system for measuring a person's heart rate using Field-Programmable Gate Array (FPGA) technology. Here's a breakdown of the key points from the information provided:Heart Rate Measurement**: The system measures a person's heart rate by monitoring their heartbeats. It does this by processing a signal acquired by operational amplifiers (OPAMPs), specifically the LM328P model. Algorithm with Level Crossing Techniques: The system employs an algorithm that utilizes level crossing techniques to analyze the acquired signal and predict the heart rate. MIT-BIH Arrhythmia Database: The system was tested using the MIT-BIH Arrhythmia Database, which is a widely used dataset for heart rate analysis. In these tests, the system achieved impressive results:
- Average detection accuracy: 99.08%
- Sensitivity: 93.33%
- Positive prediction: 98.23%
Wearable and Compact: The algorithm is designed to extract the necessary information from the photoplethysmography (PPG) signal acquired from patients. This makes it suitable for creating a wearable and compact heart rate variability measuring system that is cost-effective. FPGA Specifications: The FPGA used in the system has a maximum operating frequency of 50 MHz. It can process the input and deliver the output in a very short time, with a minimum processing period of 19.617 nanoseconds. This makes it suitable for real-time applications. Low Power Requirement: The algorithm is designed to be power-efficient. It does not require multipliers or other power-hungry processing elements, resulting in a low power requirement. Resource Utilization: The FPGA's resource utilization is very efficient. The number of Slice Flip Flops utilized is only 1%, and the number of occupied slices is only 10% of the FPGA device. This means the system is highly resource-efficient, leaving plenty of room for other functions within the FPGA. In summary, this paper presents a heart rate monitoring system that uses FPGA technology and an algorithm based on level crossing techniques to accurately predict heart rates. It is designed to be power-efficient, suitable for wearable applications, and capable of delivering real-time results. The system's performance on the MIT-BIH Arrhythmia Database is impressive, with high accuracy, sensitivity, and positive prediction rates.